Application of VLSI Framework for Image Compression Algorithms

Abstract

A picture or image, in its real form, include big amount of data which need not only large amount of memory required for its storage but also causes inconvenient transmission over limited bandwidth channel. Image compression decreases the data from the image in either lossless or loss way. While lossless image compression regains the real image data fully, it provides very less compression. Loss compression techniques compress the image data in variable amount depending on the quality of image required for its use in particular application area. It is performed in steps such as image transformation, measure and destruction coding. JPEG is mostly used image compression standard which uses discrete cosine transform (DCT) to transform the image from spatial to frequency domain. image contains low visual data in its high frequencies for which heavy quantize on can be done in order to reduce the size in the transformed representation. Coding follows to further reduce the redundancy in the transformed and quantize image data. Real-time data processing needs high speed which makes dedicated hardware improvement most preferred choice. The hardware of a system is favored by its low- cost and low-power implementation. These two factors are also the most important requirements for the portable devices running on battery such as digital camera. Image transform requires very high computations and complete image compression system is realized through various intermediate steps between transform and final bit-streams. Intermediate stages require memory to store intermediate results. The cost and power of the design can be reduced both in efficient implementation of transforms and removal of intermediate stages by employing different techniques. The proposed work is focused on the systematic hardware execution of transform based image compression algorithms by optimizing the framework of the system. Distribute arithmetic (DA) is a systematic approach to implement digital signal processing algorithms. DA is realized by two different ways, one through storage of pre- computed values in ROMs and another without ROM requirements. ROM free DA is more efficient. For the image transform, architectures of one dimensional discrete Hartley transform (1-D DHT) and one dimensional DCT (1-D DCT) have been optimized using ROM free DA technique. Further, 2-D separable DHT (SDHT) and 2-D DCT Architectures/Framework has been implemented in row-column approach using two 1-D DHT and two 1-DDCT respectively.