Low –Power Low–Voltage Asynchronous Delta–Sigma Modulator.

Authors

  • Bharath Ch
  • Sailaja M

Keywords:

Bulk driven asynchronous delta-sigma modulator, Linear transconductance integrator, Hysteric Comparator, Buffered op-amps, Unbuffered op-amps, Ultralow-power VLSI systems.

Abstract

Due to the increase in the ultralow - power VLSI systems this work is one of the solution for the ultralow - voltage bulk driven (BD) asynchronous delta – sigma modulator which is implemented in 54nm CMOS technology with VDD supply as 300 mV, the circuit leads to the total power consumption of 15.35 pW. The above mentioned result have been achieved employing a highly linear transconductor .

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Published

2020-12-23

How to Cite

Bharath Ch, & Sailaja M. (2020). Low –Power Low–Voltage Asynchronous Delta–Sigma Modulator. International Journal of Progressive Research in Science and Engineering, 1(8), 63–68. Retrieved from https://journal.ijprse.com/index.php/ijprse/article/view/212

Issue

Vol. 1 No. 8 (2020): November

Section

Articles

License

Copyright (c) 2020 Bharath Ch, Sailaja M

Creative Commons License

This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 International License.