Low Power Dissipation and Low Power Consumption SRAM Architecture Based On 22-nm CNTFET Technology

Abstract

With the improvement of switching in Nano electronics, Carbon Nano Tube (CNT) could be explored in nanoscale Metal Oxide Semiconductor Field Effect Transistor (MOSFET). Carbon Nanotube Field Effect Transistors (CNTFET) are encouraging nano-scaled devices for implementing high performance very dense and low power circuits. A Carbon Nanotube Field Effect Transistor belongs to the family of FET that utilizes a single CNT or an array of CNT’s as the channel material instead of bulk silicon in the conventional MOSFET or Fin in FinFET structure. The fundamental of a CNTFET is a carbon nanotube. In this paper, the advantages of using CNTFETs are obtainable with respect to FinFET. The power dissipation, Power-delay product and power consumption of CNTFET’s have been argued based on simulation through HSPICE Synopsys tool. This paper proposes a new design of low power SRAM cell using carbon nanotube FETs (CNTFETs) at 22nm technology node. CNFETs have received widespread attention as one of the promising successor to MOSFETs and FinFET. Analysis of the results shows that the proposed CNTFET based SRAM architecture, power dissipation, and power consumption substantially improved compared with the FinFET based SRAM cell by 97% and 97% respectively with almost same read delay.